1. Field of the Invention
This invention is related to the field of integrated circuits and, more particularly, to arbitration mechanisms for interconnect within and/or between integrated circuits.
2. Description of the Related Art
Integrated circuits in a system, or various circuitry within an integrated circuit, typically have a need to communicate with each other. In many cases, communicators in the system/integrated circuit may communicate through various addresses in a memory map. That is, various communicators are assigned addresses within the memory map, and reads/writes to the addresses are used to communicate. Typically, such communicators use read/write transactions transmitted over an interconnect between the communicators. For example, it is common to have an address bus over which the address, command, and other transaction information is transmitted to initiate a transaction. Additionally, a data bus may be used to transmit data corresponding to the transaction, if any. If cache coherency is implemented for the transactions, a response interface may be provided for maintaining the coherency states according to the coherency scheme implemented by the communicators.
To the extent that the interconnect, or a portion thereof, is shared among communicators, some mechanism for arbitrating among the communicators for use of the interconnect is needed. In the past, centralized and distributed arbitration mechanisms have been used. In a centralized arbitration mechanisms, all communicators transmit a request signal to a central arbiter, which determines which communicator is to be granted use of the interconnect (the “arbitration winner”). The central arbiter returns a grant signal to the granted communicator, and the granted communicator then drives its transaction on the interconnect. In a distributed arbitration scheme, each communicator implements a local arbiter (or a local arbiter is included nearby). Each communicator asserts its request signal to all local arbiters. The local arbiters are designed to independently determine the same arbitration winner. The local arbiter of the granted communicator informs the granted communicator, which drives its transaction onto the interconnect.
The centralized arbitration mechanism is typically simpler to implement than the distributed arbitration mechanism. However, the centralized arbitration mechanism is also typically a higher latency mechanism. The centralized arbitration mechanism includes a potentially long distance transmission of a request signal, followed by an equally long distance transmission of a grant signal, followed by the granted communicator driving its transaction. On the other hand, the more complex distributed arbitration scheme may only involve one long distance transmission (of a request signal to each of the local arbiters). Complexities in the distributed arbitration mechanism typically includes more complex “parking” of the grant on a particular communicator, complexities in flow controlling the communicators, and allocation of buffers in targeted communicators on a per-source-communicator basis.